Gabriel Jorge Menezes

Gabriel Jorge Menezes is an infrastructure engineer at Krea and a coauthor of the Krea 2 technical report. He builds the systems that train image-generation models across distributed GPU clusters and keep them available to artists and designers.

Menezes studied at Brazil’s Universidade Federal do ABC before developing a public body of work in high-performance computing. In January 2025, he described a phrase-search algorithm built around AVX-512 and VP2INTERSECT, an uncommon processor instruction that accelerates intersections between indexed document positions. His simdphrase project incorporates query ordering, memory-mapped storage and 64-byte data alignment; asm-alignment investigates how generated machine code falls across cache-line boundaries.

At Krea, Menezes helped build the infrastructure supporting Krea 2, an image model trained from scratch and released in raw and accelerated versions. His account of training and serving the model details four practical priorities:

• Measure productive GPU work. Headline utilization can conceal inefficient execution. Menezes tracks tensor-core utilization, GPU temperatures, InfiniBand throughput and errors, and NVLink health to identify thermal throttling and communication failures.
• Make training recoverable. Frequent checkpointing and high-throughput shared storage preserve progress when synchronized jobs fail unpredictably across a large cluster.
• Share GPUs between training and production. Kueue gang scheduling and Kubernetes workload priorities reserve complete groups of GPUs for researchers while redirecting live inference whenever training consumes local capacity.
• Orchestrate external inference capacity. A Virtual Kubelet integration represents outside GPU providers as Kubernetes nodes, translates workloads for each provider and relies on existing autoscaling and failure-recovery mechanisms. Taints and gradual rescheduling move inference back onto local GPUs when training ends, reducing rental costs without interrupting production.

His work spans processor-level performance investigation and the operational design required to keep generative-image research and production running on the same hardware.